fritte bead placement in pcb
shahabjafari372@gmail.com , 01-17-2022, 12:09 AM
hello every one
in these pictures the voltage of fpga and flash memory has a fritte bead at first of circuit . i want to ask you that where we should place the fritte bead? we should place near or far from fpga and flash memory? i think that it should be placed near the supply of circuit. and if the supply is near the fpga we should bring the trace of supply far from fpga and place fritte bead there or it doesnt matter?
what is your idea about these 2 questions?
in these pictures the voltage of fpga and flash memory has a fritte bead at first of circuit . i want to ask you that where we should place the fritte bead? we should place near or far from fpga and flash memory? i think that it should be placed near the supply of circuit. and if the supply is near the fpga we should bring the trace of supply far from fpga and place fritte bead there or it doesnt matter?
what is your idea about these 2 questions?
robertferanec , 01-17-2022, 03:04 AM
Usually you create a local power plane which is in the area where all the components powered with this local voltage are located and then you connect this power plane through a bead or 0R. So we can say, the bead or 0R is placed close the the chip.
Comments:
shahabjafari372@gmail.com, 01-17-2022, 03:36 AM
thank you very much
qdrives , 01-17-2022, 06:27 PM
Be careful with adding a ferrite bead and just plain capacitors. The two will create a resonance that may worsen the effect you want to achieve.
More details here: https://designhelp.fedevel.com/forum...7154#post17154
Does the position matter? Well it is mostly an inductor as is the trace. So I do not think it matters. The capacitors is a different story.
More details here: https://designhelp.fedevel.com/forum...7154#post17154
Does the position matter? Well it is mostly an inductor as is the trace. So I do not think it matters. The capacitors is a different story.
shahabjafari372@gmail.com , 01-17-2022, 11:06 PM
@@qdrives thank you that was useful simulation. im not sure that the placement of ferrite bead should be near the the chip or not and because of that i asked here . but i think it must place near the voltage source to prevent to be our circuit noisy
binayak , 03-29-2022, 09:38 PM
Just few points to ponder about:
(1) Why do you need the filtered raill QSPI_VCC in the first place? What is the ac noise margin requirement for the power rail (Vcc) for U17? Similarly what is the AC noise margin requirement of the IC that is being powered by +3V3D? This is the point that will decide if you need the series PDN filter ( FB10, C173). Be very careful on the current requirements. PDN filters are like scalpel which have a very specific use; they can be misapplied very very easily. Try looking articles on ferrites Istvan Novak. That should clear things out.
(2) If you come to the conclusion that you need the series PDN filter after doing proper analysis, then it is better to keep this filter near the load that it powers.
(3) Don't forget about the possibility of parallel resonance that can peak the self impedance as seen by the load. Make sure, that you take care of that. So choose the elements of the series PDN filter with proper calculations to lower the Q.
Hope this helps.
(1) Why do you need the filtered raill QSPI_VCC in the first place? What is the ac noise margin requirement for the power rail (Vcc) for U17? Similarly what is the AC noise margin requirement of the IC that is being powered by +3V3D? This is the point that will decide if you need the series PDN filter ( FB10, C173). Be very careful on the current requirements. PDN filters are like scalpel which have a very specific use; they can be misapplied very very easily. Try looking articles on ferrites Istvan Novak. That should clear things out.
(2) If you come to the conclusion that you need the series PDN filter after doing proper analysis, then it is better to keep this filter near the load that it powers.
(3) Don't forget about the possibility of parallel resonance that can peak the self impedance as seen by the load. Make sure, that you take care of that. So choose the elements of the series PDN filter with proper calculations to lower the Q.
Hope this helps.
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