USB C DP/DN lines length matching problem
bremenpl , 04-05-2019, 05:37 AM
Hello there,
I am working on a project where I need to incorporate USB C technology. I am having problem with properly routing the USB C connector. The problem is that when using USB C, one can insert the plug to the socket in 2 ways. depending on which side it is inserted (A or B), the A pins or B pins are connected. If you want to be ready for both sides insertion, both A and B part has to be connected. It is problematic, since the pins are "crossed". Please take a look at the attached screen. I am trying to route the 12401548E4#2A connectors DP and DN lines there (US0_P and SDB0_N differential lines). B7 pad is crossed with A7 (same for A6 and B6)... To route this, one has to place at least one of the traces on the bottom layer. Even if the length is matched, it is only matched for 1 plugging scenario and the other part of the trace is left as a STUB...
I am quite confused on routing this properly. I would appreciate all help from someone routing USB C connectors before.
bremenpl , 04-05-2019, 06:14 AM
The best I could come up with, but it has stubs :/
Comments:
Lakshmi, 04-09-2019, 08:11 AM
Okay MCP2221A good option.Yea Trace width is sufficient. Good Luck.
Paul van Avesaath , 04-07-2019, 01:08 PM
go for option 2 but for your bottom layer routing go for differential (so close togethor) and go down and past your via's and make a " u turn" back
dont forget to match the inner corner since it will be shorter than the outside of the differential pair
bremenpl , 04-07-2019, 01:54 PM
Hi Paul, thank you for answer. Did you mean something like this?
Paul van Avesaath , 04-07-2019, 02:04 PM
yup thats it.. one small suggestion
if you look at the way you go to your via's on the toplayer (evenly spaced from the middle).. if you take that entry and copy it onto the bottom so you exit is the same as the entry it even better!
and try and start evenly from your start via's
bremenpl , 04-07-2019, 02:09 PM
Like this, if I got it right?
Since the length did not change, is it only a visual improvement, or does the additional symmetry near the via improve some electrical parameters?
Paul van Avesaath , 04-07-2019, 02:24 PM
Nope, did a manual sketch as an example!
sorry am working on my phone here.
bremenpl , 04-07-2019, 02:49 PM
I think I got it right this time. Thank you very much for help.
Paul van Avesaath , 04-07-2019, 03:24 PM
yes!! well done sir!
bremenpl , 04-09-2019, 07:19 AM
Is this better for the routing near IC?
bremenpl , 04-09-2019, 07:50 AM
Or this?
bremenpl , 04-09-2019, 08:09 AM
The USB IC
robertferanec , 04-15-2019, 04:40 AM
bremenpl , 04-15-2019, 05:04 AM
Hi Robert, thank you for answer.
The example you have shown is indeed interesting, but I cannot math it 1:1 not only because as you mentioned it's a different connector, but also I only have 4 layers PCB (I dont route any signals in the GND and power plane). I also think that the amount of VIA's per connection in their USB 2.0 differential pair is not equal.
robertferanec , 04-18-2019, 03:08 AM
Maybe have a look also at the TPS65982 chip. I am not sure if that could help (but it will probably add also cost and take some space)
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