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Differential Pair Crosstalk
IMR , 05-20-2016, 01:18 AM
Hi Robert,
In lesson 3 of the Fedevel Advanced PCB Layout Course you showed us how to calculate the crosstalk using the Saturn PCB toolkit for a reset line that was placed in close proximity of a clock signal. I'm now wondering what happens if a differential signal pair doesn't have enough clearance between each trace. If for example the positive differential pair signal has 3.3V for a logic high and the coupled voltage is 2.9V, and the negative differential pair signal has a -3.3V for a logic high and the coupled voltage is -2.9V does this mean that I will see 0.4V (3.3V-2.9V) at the positive differential pair signal and -0.4V (-3.3V+2.9V) at the negative differential pair signal?. Would this possibly prevent a logic high from being set as the difference between the pair is now 0.8V and not 6.6V?
In lesson 3 of the Fedevel Advanced PCB Layout Course you showed us how to calculate the crosstalk using the Saturn PCB toolkit for a reset line that was placed in close proximity of a clock signal. I'm now wondering what happens if a differential signal pair doesn't have enough clearance between each trace. If for example the positive differential pair signal has 3.3V for a logic high and the coupled voltage is 2.9V, and the negative differential pair signal has a -3.3V for a logic high and the coupled voltage is -2.9V does this mean that I will see 0.4V (3.3V-2.9V) at the positive differential pair signal and -0.4V (-3.3V+2.9V) at the negative differential pair signal?. Would this possibly prevent a logic high from being set as the difference between the pair is now 0.8V and not 6.6V?
mairomaster , 05-20-2016, 01:54 AM
You should not worry about a crosstalk between the traces of a single differential pair. The two traces run signal with an opposite phase, so any cross talk between them cancels out, when the signal reaches the receiver. Here you can check an article on a similar topic:
The voltage levels with differential signals is another confusing topic. Lets take the LVDS standard as an example:
Each signal goes between 1.0 V and 1.4 V relative to ground. The two signals are always in an opposite phase. That means that for a logic 1, you have the + signal at 1.4 V and the - signal at 1.0 V. For a logic 0 you have the opposite. The common mode voltage is the mid point between the high votlage and the low voltage - 1.2 V in this case. The differential voltage is the difference between the two absolute voltages. For a logic 1 you have 1.4 - 1.0 = 0.4 V. For a logic 0 you have 1.0 - 1.4 = -0.4 V. So the peak value of the differential voltage is 0.4 V and the peak to peak value is 0.8 V (0.4 - (- 0.4)). The differential voltage is what is actually seen at the receiver end, since the signals are subtracted from each other there.
The voltage levels with differential signals is another confusing topic. Lets take the LVDS standard as an example:
Each signal goes between 1.0 V and 1.4 V relative to ground. The two signals are always in an opposite phase. That means that for a logic 1, you have the + signal at 1.4 V and the - signal at 1.0 V. For a logic 0 you have the opposite. The common mode voltage is the mid point between the high votlage and the low voltage - 1.2 V in this case. The differential voltage is the difference between the two absolute voltages. For a logic 1 you have 1.4 - 1.0 = 0.4 V. For a logic 0 you have 1.0 - 1.4 = -0.4 V. So the peak value of the differential voltage is 0.4 V and the peak to peak value is 0.8 V (0.4 - (- 0.4)). The differential voltage is what is actually seen at the receiver end, since the signals are subtracted from each other there.
robertferanec , 05-20-2016, 03:02 AM
Hi @IMR. @mairomaster is right. If differential pairs are routed correctly you do not need to worry about crosstalk between Positive and Negative signals of one differential pair. Of course, you need to be careful about routing multiple differential pairs close to each other.
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