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Kostas_P , 02-25-2016, 06:01 AM

Hi Robert,

I am working on a project on designing a PCIe riser card. In order to have a smoooth routing i need to reverse the polarity of the differential pais signals. I have checked the Hardware Design Considerations for PCI Express of freescale and on the attached file says that is possible to reverse the polarity of the differential signals. My question is, can i reverse the polarity of the reference clock diff pair signal (REFCLK+ AND REFCLK-) as well?

Thank you!

robertferanec , 02-27-2016, 02:26 AM

Hello @Kostas_P. I have also read, that you can swap PCIE +/-, but I have never used it. I would say, this doesn't apply to clock ... as clock is usually generated by something else. However, maybe there are some special clock generators which can do that.

Kostas_P , 02-29-2016, 04:33 AM

Thanks Robert!

I would like to ask another one question. In my application, i need to connect decoupling caps in the TX PCIe signals. Do i have to place decoupling caps for the reference clock differential pair aswell?

robertferanec , 02-29-2016, 09:19 AM

I would follow reference design (reference board / datasheet / ...). I have seen schematics with both: with and without capacitors. If you are still not 100% sure, you may want put there option to fit 0R or 100nF component (possibly even more options, we discussed something similar here: http://www.fedevel.com/designhelp/fo...ut-termination)