As most of the DDR3 chips come in BGA packages and often it's tricky to route signals. Hence chip manufacturers/JEDEC provisioned data bit/byte swapping. This is valid only to the data (DQ) signals.
1) DQ signals can be swapped within a data byte.
2) Bytes group can be swapped, all signals DQ, DQS, DM have to be swapped.
Note that the DQ signal cannot be swapped between data bytes.
Eg DQL0 can be swapped between DQL1-DQL7 and not with DQU0-DQU7.
If data bytes are swapped connect the relevant data mask (DM) and strobe (DQS_N, DQS_P) to the appropriate data byte group, also DQS signals cannot be swapped within the differential pair.
Find out more about this from the memory manufacturer or DDR design guides.