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Beko , 04-27-2020, 08:47 AM

Hi,

I came across this so called "excellent" stackup for EMC/SI in a document and would like to consider using it but I do have a question regarding impedance calculations. Which layers should be taken as reference planes for signal layers 4 and 5? For example, is it layers 3(GND) and 6(PWR) for layer 4 since they are the closest planes to this specific layer? or should we even consider layer 6(PWR) as reference since it is quite far away?

Another question regarding this stackup is what would be a good distance (ignoring the manufacturer preferences for the time being) between layers? From the looks of it GND and PWR layers are very close to each other so if we give it a thickness of x1, would the others be x2 between L1 and L2, x4 between L3 and L4 and x20 (maybe) between L4 and L6?

Thank you in advance for sharing your thoughts.

Regards,

Beko

omid.fotouhi , 04-27-2020, 11:22 AM

Hi
Reference plane for layer 4 is layer 3 , for layer 5 is layer 6 , but be careful you should use decoupling capacitor for PWR plane , if you use them as reference planes.

Beko , 04-27-2020, 03:27 PM

Hi Omid,

Thank you for your response. So you think I should omit the far away PWR planes (L6 for L4 and L3 for L5) from impedance calculations altogether, correct?

omid.fotouhi , 04-27-2020, 09:26 PM

Yes , their effects are less than L3 and L6. But as I say use decoupling capacitors for sharp reference PWR planes.

robertferanec , 04-29-2020, 11:32 AM

I agree with @omid.fotouhi. Also, I would like to add ... personally I would not use this stackup (I have never seen this used in boards). I see value in having Power plane close to GND plane, but I do not like to have Power plane as a reference plane (especially for signals with mixed levels) and if possible I like to avoid having neighbor signal layers. Generally I do not use 8 layer stackup.