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Nguyenvanhieu , 01-24-2018, 07:20 AM

Dear Robert,
I read design guide IMX6DQ6SDLHDG and see that PCIE_VPH pin need to be connected to VDD_HIGH_CAP and is generated by IMX but in openrex schematic, you connect it to 2V5 that is generated by PWR PMIC. Can you explain why? More detailed in these pictures below.

robertferanec , 01-24-2018, 07:11 PM

@Nguyenvanhieu, did you check reference schematics? How did they connect it there?

PS: I do not remember (I would have to search for the information), but I believe we followed a reference schematic.

Nguyenvanhieu , 01-24-2018, 08:28 PM

I had a look in reference design and see that they connect PCIE_VPH to VDD_HIGHCAP

Nguyenvanhieu , 01-24-2018, 08:46 PM

And I want to ask another question:why some peripherals have I2C address but others don't have?

robertferanec , 01-25-2018, 10:43 AM

PCIE_VPH: I attached screenshot from Sabre Lite Rev D reference schematic. I do not remember exactly, but you just may need to connect 2.5V to PCIE_VPH and maybe they used VDD_HIGHCAP because they didn't want to use a separate regulator to generate 2.5V. I am not sure what reference schematic you are looking at.

I2C: Some devices may have multiple I2C address, that's why we have not specified it in the table

ranaya , 02-07-2018, 01:07 AM

@Nguyenvanhieu IMX6DQ6SDLHDG states a an example with MMPF0100 power management ic. In some cases, VDD_HIGH_CAP is also used for NVCC_LVDS_2.5 supply rail of IMX6. According to PCIE 5G operation, PCIE_VPH consumes around 25 mA. So if the VDD_HIGH_CAP cannot produce this then use of an external regulator is preferred. However, just bypassing IMX6 internal regulators or not using them can save a lot of power from IMX6 !

Anuradha