How do you chose pins for DDR3 data bus?
Wesperos , 01-16-2017, 02:44 AM
Hello,
I'm quite new in the MPU-DDR3 design, so sorry if my question is somewhat unsophisticated.
Anyways, I'm studying Advanced PCB layout with the iMX6 Rex Module I and see that the board interfaces MPU with 4 chips of DDR3, each 2GB of memory. I understand that this way we can use total of 8 GB RAM with the 64 data bus of MPU. What I don't understand is how each chip knows when it is being called when they're all connected to the same address bus? Does it work as a standard "Chip Select" or "Chip Enable" protocol?
One more thing: 64 lines on DRAM_D[63..0] bus are assigned to different DDR3 chip, but how do you decide which chip gets what trace? For instance, U2 is connected to DRAM_D 8, 9, 13,14,12,15,10,11,0,5,2,4,7,6,1, and 3? How do you chose this order? Is there any design rule for that?
Cheers,
W.
I'm quite new in the MPU-DDR3 design, so sorry if my question is somewhat unsophisticated.
Anyways, I'm studying Advanced PCB layout with the iMX6 Rex Module I and see that the board interfaces MPU with 4 chips of DDR3, each 2GB of memory. I understand that this way we can use total of 8 GB RAM with the 64 data bus of MPU. What I don't understand is how each chip knows when it is being called when they're all connected to the same address bus? Does it work as a standard "Chip Select" or "Chip Enable" protocol?
One more thing: 64 lines on DRAM_D[63..0] bus are assigned to different DDR3 chip, but how do you decide which chip gets what trace? For instance, U2 is connected to DRAM_D 8, 9, 13,14,12,15,10,11,0,5,2,4,7,6,1, and 3? How do you chose this order? Is there any design rule for that?
Cheers,
W.
mairomaster , 01-16-2017, 06:22 AM
Hi @Wesperos
First, you should be careful with the units - each chip is 2Gb (Gigabits) or 512 MB, not 2 GB (Gigabytes). That gives you 2GB in total.
The chips work in parallel - that's how you are getting 64 bit wide data bus. Data is written/read to all of them simulations - that's why there is only 1 chip select signal connected to the 4 chips. In some other schemes multiple chip select signals can be used to write/read to different chips independently.
For the second part of the question - each chip is connected to two consecutive banks of data signals (16 in total). The bits are not connected in order because pin swapping is used. Pin swapping is a common technique that makes the layout easier. In some of the lesson of the course Robert speaks about pin swapping, maybe you haven't reached that part yet. In the forum/internet you can find a lot of information about the topic.
First, you should be careful with the units - each chip is 2Gb (Gigabits) or 512 MB, not 2 GB (Gigabytes). That gives you 2GB in total.
The chips work in parallel - that's how you are getting 64 bit wide data bus. Data is written/read to all of them simulations - that's why there is only 1 chip select signal connected to the 4 chips. In some other schemes multiple chip select signals can be used to write/read to different chips independently.
For the second part of the question - each chip is connected to two consecutive banks of data signals (16 in total). The bits are not connected in order because pin swapping is used. Pin swapping is a common technique that makes the layout easier. In some of the lesson of the course Robert speaks about pin swapping, maybe you haven't reached that part yet. In the forum/internet you can find a lot of information about the topic.
Wesperos , 01-16-2017, 08:40 AM
Thanks for the answer @mairomaster ! I've made some research on DDR3 addressing and now I have it much clearer. For future references, I'll put some useful links here and here.
Regarding second answer, all right, that explains a lot. I knew pin swaping is used with many logical gate, or resistor arrays but I didn't know it can be used with MPUs and DDR3s. Then again, it makes sense - each memory chip doesn't care how are you going to connect it, as long as you remember which pins correspond to which data line.
Regarding second answer, all right, that explains a lot. I knew pin swaping is used with many logical gate, or resistor arrays but I didn't know it can be used with MPUs and DDR3s. Then again, it makes sense - each memory chip doesn't care how are you going to connect it, as long as you remember which pins correspond to which data line.
robertferanec , 01-16-2017, 02:55 PM
Thank you @mairomaster 
Be careful. Each byte of data signals has it's own strobe signals, so there are some limitations and rules which you need to follow during the swapping. We discussed this quite a lot on this forum, just search for it.
Then again, it makes sense - each memory chip doesn't care how are you going to connect it, as long as you remember which pins correspond to which data line.
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