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Platform forum

tpr , 08-22-2021, 03:09 AM

Hello,

During my course, i started reading schematics and i appreciate if you could answer to me some of my questions.

At first, i notice that all CPU's GPIOs are buffered with level translators IC (e.g 74LVC8T245 / ) but with the same voltage potential. (the two levels are 3V3 but with a ferrite bead or resistor). This is recommended for protection level and how is this explained?

Second, there is a common mode choke (L905), i know the theory of using something like that, but i dont know how can i decide for the exact inductance. (10mH) also i have the same question for emi filter choice (NFM18PC105R0J3).

Thanks in advance!
Thanos

tpr , 08-22-2021, 06:49 AM

For second question i have already the answer and i took that from robert's video with Min about emc improvements!

But for the first i am going wait your answer/suggestions

robertferanec , 08-23-2021, 02:08 AM

Sometimes buffers are used to improve signals (to make them stronger and keep the signal quality good) e.g if the tracks travel too far or if more chips and connectors are connected.

tpr , 08-23-2021, 02:10 AM

Thank you very much for your response!