FEDEVEL
Platform forum

Alaeddine , 12-21-2024, 07:55 PM

Hi everyone, this is my first project ever. The board contain a low power fpga and has 4 layers (SIG-GND-GND-SIGNAL) and i have some questions about it.

1) Is it okay to route my power circuitry like i did? On the top layer i used 0.5mm tracks and whenever i have the place i place a via to route the majority of power tracks on the bottom layer where i used 1mm tracks and polygons. But at some places i routed some the power pins on the top. You can see the attached pictures.

2) Is it possible or is it better to fill the top and bottom layer with a big GND Polygon ?

thanks in advance

QDrives , 12-21-2024, 11:19 PM

I only see red = top?
A thing I usually do with a MCU is to put a small polygon pour below the MCU on top layer and have that 3.3V. Inner layer 1 is Gnd.
Make the via to Gnd from your decoupling capacitors shorter.

Alaeddine , 12-22-2024, 10:09 AM

Red is my 3V3 traces around the board top and bottom and the reason why i used 2 inner layers as ground is that i routed some important tracks like JTAG