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Doubts about controlled impedance in PCBs.
oscargomezf , 09-01-2016, 04:07 AM
Hi everyone,
I’ve started to use control impedance because I have to add in my design a USB/UART transceiver and three gigabit phys, so I was reading in the datasheet that it’s compulsory to add controlled impedance.
I had never used impedance control in my tracks before but I've read in this blog that it’s necessary for the normal tracks too and it has to be 50 Ohms. And this is my first question:
1º.- Is that true? Or Is this only necessary in high-speed lines like USB PHY and Ethernet PHY transceivers (RXD0, RXD1, RXD2, RXD2, RX_CTL, RX_CLK, ...etc)? Do I have to do controlled impedance in I2C lines too [50 Ohms]?
The manufacturer, which I usually work, gives me this information of the stack-up. View photo 1: Stack_up_6_layer.png.
I'm trying to understand well the way to design PCB with controlled impedance. After reading a lot of this issue, I've got an important premise: “The manufacturer have to give you the information about the material of your stack-up: thickness of all prepegs and cores, Er, copper weight, plating thickness,... etc;â€. And then knowing this data, you have to calculate the conductor width, conductor height and conductor spacing for differential impedance, and conductor width and conductor height for single ended impedance, using for example Saturn PCB Design toolkit.
But when you get this data from the manufacturer: thickness of all prepegs and cores, Er, copper weight, plating thickness, …etc. they are theoretical values. So these are other important questions:
2º.- Are these theoretical values enough to get your impedance goal?
3º.- Is it necessary to create TC (Test Cupons) on PCB to validate the calculations and make sure the design is right?
According to the material data, I have a lot of doubts about the dielectric constant (also known as relative permittivity). The PCB manufacturer didn’t give me the Er, but I was surfing on the internet and I found that for the Prepeg 2116x2 is around 3.8. I was doing test with the different values of Er with the application Saturn PCB Design toolkit and I realized that it’s extremely important this value, if you get a light wrong value your calculations will be out of range, so:
4º.- Is it a good idea based the Er value on an internet search? Where could I get this value in a reliable way?
5º.- Er depends on the frequency so what frequency value do you get to make the calculations with the Saturn PCB Design toolkit?
For USB2.0, the requirements are Zdiff = 90 Ohms with a tolerance of +/-10%, view Photo 2: Saturn_PCB_DIFF90.png.
6º.- Do you think this conductor width and conductor spacing are ok?
For gigabit Ethernet, the requirements are Zdiff 100 Ohms, obviously you goal is to get 100 Ohms, but do you have to take into account the single ended impedance or it doesn't matter?, view Photo 2: Saturn_PCB_DIFF100.png.
7º.- Is this design right?
Or Do I have to try to achieve a single impedance of 5o ohms?
And for the rest of the tracks:
8º.- What do I have to get? impedance of 50 Ohms or 55 Ohms?
Best regards.
I’ve started to use control impedance because I have to add in my design a USB/UART transceiver and three gigabit phys, so I was reading in the datasheet that it’s compulsory to add controlled impedance.
I had never used impedance control in my tracks before but I've read in this blog that it’s necessary for the normal tracks too and it has to be 50 Ohms. And this is my first question:
1º.- Is that true? Or Is this only necessary in high-speed lines like USB PHY and Ethernet PHY transceivers (RXD0, RXD1, RXD2, RXD2, RX_CTL, RX_CLK, ...etc)? Do I have to do controlled impedance in I2C lines too [50 Ohms]?
The manufacturer, which I usually work, gives me this information of the stack-up. View photo 1: Stack_up_6_layer.png.
I'm trying to understand well the way to design PCB with controlled impedance. After reading a lot of this issue, I've got an important premise: “The manufacturer have to give you the information about the material of your stack-up: thickness of all prepegs and cores, Er, copper weight, plating thickness,... etc;â€. And then knowing this data, you have to calculate the conductor width, conductor height and conductor spacing for differential impedance, and conductor width and conductor height for single ended impedance, using for example Saturn PCB Design toolkit.
But when you get this data from the manufacturer: thickness of all prepegs and cores, Er, copper weight, plating thickness, …etc. they are theoretical values. So these are other important questions:
2º.- Are these theoretical values enough to get your impedance goal?
3º.- Is it necessary to create TC (Test Cupons) on PCB to validate the calculations and make sure the design is right?
According to the material data, I have a lot of doubts about the dielectric constant (also known as relative permittivity). The PCB manufacturer didn’t give me the Er, but I was surfing on the internet and I found that for the Prepeg 2116x2 is around 3.8. I was doing test with the different values of Er with the application Saturn PCB Design toolkit and I realized that it’s extremely important this value, if you get a light wrong value your calculations will be out of range, so:
4º.- Is it a good idea based the Er value on an internet search? Where could I get this value in a reliable way?
5º.- Er depends on the frequency so what frequency value do you get to make the calculations with the Saturn PCB Design toolkit?
For USB2.0, the requirements are Zdiff = 90 Ohms with a tolerance of +/-10%, view Photo 2: Saturn_PCB_DIFF90.png.
6º.- Do you think this conductor width and conductor spacing are ok?
For gigabit Ethernet, the requirements are Zdiff 100 Ohms, obviously you goal is to get 100 Ohms, but do you have to take into account the single ended impedance or it doesn't matter?, view Photo 2: Saturn_PCB_DIFF100.png.
7º.- Is this design right?
Or Do I have to try to achieve a single impedance of 5o ohms?
And for the rest of the tracks:
8º.- What do I have to get? impedance of 50 Ohms or 55 Ohms?
Best regards.
mairomaster , 09-01-2016, 08:18 AM
1. You don't need to use impedance control for low speed signals, it doesn't matter with them.
2. The manufacturer SHOULD provide you with track geometries for the impedance controlled signals on the different layers. Even that Saturn is a nice calculator for a bullpark estimates, many times you would be getting a value which differs from the reality quite a bit. This might not be crucial for the design, but the standard practice is to use the geometries provided by the manufacturer. They have much more involved software for calculating the track geometries based on the particular stack and impedance requirements.
3. Test coupons are normally not required, you can trust your manufacturer. Apart from that, I believe the manufacturers test the impedance of the manufactured board using some of the available tracks on the board. Make sure you provide them with an impedance tolerance requirement (I normally use +/- 10%).
4. If you have the exact brand/model of the material, you can find a datasheet for this material. All important properties are mentioned there.
5. I am not sure, but I don't think Er would vary that much with frequencies. Otherwise it would have been impossible to have an interface running at 100 MHz and one running at 3 GHz at the same layer for example
6. Normally with differential interfaces you have a requirement for the differential impedance and you shouldn't care much about the single ended one. There might be exceptions, but I am not aware of such.
7. Refer to 2.
8. I don't understand why are you wondering between 50 and 55? Can you clarify please?
2. The manufacturer SHOULD provide you with track geometries for the impedance controlled signals on the different layers. Even that Saturn is a nice calculator for a bullpark estimates, many times you would be getting a value which differs from the reality quite a bit. This might not be crucial for the design, but the standard practice is to use the geometries provided by the manufacturer. They have much more involved software for calculating the track geometries based on the particular stack and impedance requirements.
3. Test coupons are normally not required, you can trust your manufacturer. Apart from that, I believe the manufacturers test the impedance of the manufactured board using some of the available tracks on the board. Make sure you provide them with an impedance tolerance requirement (I normally use +/- 10%).
4. If you have the exact brand/model of the material, you can find a datasheet for this material. All important properties are mentioned there.
5. I am not sure, but I don't think Er would vary that much with frequencies. Otherwise it would have been impossible to have an interface running at 100 MHz and one running at 3 GHz at the same layer for example
6. Normally with differential interfaces you have a requirement for the differential impedance and you shouldn't care much about the single ended one. There might be exceptions, but I am not aware of such.
7. Refer to 2.
8. I don't understand why are you wondering between 50 and 55? Can you clarify please?
Comments:
oscargomezf, 09-01-2016, 09:37 AM
Thank you mariomaster,According to answer 1-> What's the limit frequency to consider a low-speed signal?According to answer 2-> I was talking to my usual manufacturer in Spain and they don't give me this data. I'll have to talk with them again it's a little bit strange,According to answer 5-> I'm going to research about this, but I completely agree with you, the Er will have to be stable in the same material.According to answer 8 -> I was reading this web page http://www.fedevel.com/welldoneblog/...-your-projects from Fedevel. And sometimes it uses 50 Ohms and others 55 Ohms for the singled ended signals.Best regards.
robertferanec , 09-02-2016, 09:13 AM
1) We use 50 OHM for all digital signals. This is my opinion: Most of the buffers are similar. For example CMOS buffers can be used in "slower" (e.g. GPIO pin) and also "faster" signals (e.g. SDIO interface) and they have quite sharp rising and falling edge. This sharp edge still can influence your PCB layout (e.g. if signals are routed in parallel, crosstalk may occur). So, we use 50 OHMS even for the "slow" signals to keep the quality of signal good (to minimize reflection and crosstalk which could possibly influence other signals routed on the same board). But, this is only my opinion Of course, of you do not have a impedance controlled PCB, do not bother with that - use any impedance.
​2) see @mairomaster's answer, I agree
3) If you like, you can add test coupons e.g. if you are designing panel, but I believe, if you require impedance controlled PCB, the PCB manufacturer add some stuff to the panel, so they can do the measurements after the PCB is done. I am not 100% if they add their own coupons, but they do have a way to measure it as if you ask them, they will send you reports.
4) see @mairomaster's answer, I agree
5) unless you do something very specific with extremely impedance sensitive, Er is not changing so much with frequency and it's not going to influence the results rapidly. You can use a middle number somewhere between 100MHz to 5GHz - it's not going to be a big difference. Don't forget, PCB manufacturer will not manufacture PCBs with the exact impedance anyway - they need to meet tolerance which is normally +/- 10% - that is a huge range e.g. for 100OHM it means 90-110 OHMS.
6) For differential pair single ended tracks we normally use the same width as for 50OHM single ended and calculate the space. Some differential pairs may require lower / higher impedance of individual tracks (the single ended impedance of tracks used in differential pair) e.g. clocks or USB. For example, google for "COM Espress Design guide" and have a look at the pages on the end .... here is an example (starts at page 182 - PCI Express Trace Routing Guidelines ): https://www.msc-technologies.eu/file...2013-12-06.pdf
8) We mostly use 50 OHM, in some stackups that is very difficult, so we use 55 OHM.
Of course, of you do not have a impedance controlled PCB, do not bother with that - use any impedance.​2) see @mairomaster's answer, I agree
3) If you like, you can add test coupons e.g. if you are designing panel, but I believe, if you require impedance controlled PCB, the PCB manufacturer add some stuff to the panel, so they can do the measurements after the PCB is done. I am not 100% if they add their own coupons, but they do have a way to measure it as if you ask them, they will send you reports.
4) see @mairomaster's answer, I agree
5) unless you do something very specific with extremely impedance sensitive, Er is not changing so much with frequency and it's not going to influence the results rapidly. You can use a middle number somewhere between 100MHz to 5GHz - it's not going to be a big difference. Don't forget, PCB manufacturer will not manufacture PCBs with the exact impedance anyway - they need to meet tolerance which is normally +/- 10% - that is a huge range e.g. for 100OHM it means 90-110 OHMS.
6) For differential pair single ended tracks we normally use the same width as for 50OHM single ended and calculate the space. Some differential pairs may require lower / higher impedance of individual tracks (the single ended impedance of tracks used in differential pair) e.g. clocks or USB. For example, google for "COM Espress Design guide" and have a look at the pages on the end .... here is an example (starts at page 182 - PCI Express Trace Routing Guidelines ): https://www.msc-technologies.eu/file...2013-12-06.pdf
8) We mostly use 50 OHM, in some stackups that is very difficult, so we use 55 OHM.
Nguyenvanhieu , 10-16-2016, 07:03 PM
Wow.A lot of useful information right here.
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