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ANALOG , 03-25-2023, 07:59 AM

Hi all,

I would like to route 2 DDR3 IC signals with fly-by routing topologies. Could you help me about the below questions that confuse me?

1. Can ı route DQ signals at different layers ? (Total length will be same)
2. Can ı route Address signals at different layers ? (Total length will be same)

​Regards

robertferanec , 03-27-2023, 02:26 AM

1. Personally, I have never done this and I would not do that (routing signals from one DQ group on multiple layers)
2. I have done this

Check DDR3 memory JEDEC reference designs. I think some of them have address routed on multiple layers

However I try to avoid this approach as it is tight up to a specific stackup. Any changes in stackup may influence length matching.