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Altium same net clearance problem
Mertug , 01-19-2016, 02:54 AM
Hello Robert,
We want to have drc violation for the cases as the first attached picture. As can be seen in the attachment, the clearance for via to track is 4 mils. However the distance between track and via which belong to the same net is less than 4 mils and there is no violation as can be seen from the first picture. This causes pcb producibility problems.
When we define clearance rule for same net objects we get violation for everything (even the track connections and track leaving the via connection is now a violation as can be seen from the picture 3 & 4) including the case mentioned above. We are using Altium 15.1.13 and in Altium 16 there is a paper in the link below for some resolution to this problem, i would like to ask if you have any suggestion for Altium 15.
https://techdocs.altium.com/display/...ance+Rule))_AD
Thanks in advance..
We want to have drc violation for the cases as the first attached picture. As can be seen in the attachment, the clearance for via to track is 4 mils. However the distance between track and via which belong to the same net is less than 4 mils and there is no violation as can be seen from the first picture. This causes pcb producibility problems.
When we define clearance rule for same net objects we get violation for everything (even the track connections and track leaving the via connection is now a violation as can be seen from the picture 3 & 4) including the case mentioned above. We are using Altium 15.1.13 and in Altium 16 there is a paper in the link below for some resolution to this problem, i would like to ask if you have any suggestion for Altium 15.
https://techdocs.altium.com/display/...ance+Rule))_AD
Thanks in advance..
robertferanec , 01-19-2016, 12:07 PM
@Mertug, honestly, I don't know 
We had a look and spent some time to try to find a way how you could detect it, but I am not really sure. We also tried to check it in gerber files, no results. Maybe someone else has an idea?
We had a look and spent some time to try to find a way how you could detect it, but I am not really sure. We also tried to check it in gerber files, no results. Maybe someone else has an idea?
Mertug , 01-20-2016, 02:57 AM
Hello,
Thank you robert for quick response. I have figured the problem out and here is the conclusion i came. Sharing the solution if someone else gets into this issue.
I have installed Altium Designer 16 and could create same net clerance rule for only the cases like above and get violation. However there is an issue with polygons, polygon to via or polygon to pad, same net clerance rule have a problem such that it gives violation for vias in polygon and pads inside the polygon. Altium still needs to work on that. To sum up, same net clerance rule works good except polygons in Altium Designer 16. Therefore creating rule excluding polygons will solve the issue.
Thank you robert for quick response. I have figured the problem out and here is the conclusion i came. Sharing the solution if someone else gets into this issue.
I have installed Altium Designer 16 and could create same net clerance rule for only the cases like above and get violation. However there is an issue with polygons, polygon to via or polygon to pad, same net clerance rule have a problem such that it gives violation for vias in polygon and pads inside the polygon. Altium still needs to work on that. To sum up, same net clerance rule works good except polygons in Altium Designer 16. Therefore creating rule excluding polygons will solve the issue.
robertferanec , 01-20-2016, 12:54 PM
Thank you very much @Mertug for leaving your feedback. We will try that!
syhaunguyen , 02-15-2016, 11:47 AM
@Mertug Did you try on Altium Designer 16?
I just have quick test same net, it run as well on Altium Designer 16.0.6
I just have quick test same net, it run as well on Altium Designer 16.0.6
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