FEDEVEL
Platform forum

nickagian , 09-28-2017, 02:59 PM

Hi!

I am totally new in Altium and have a question regarding connectivity in a multi-sheet design.

What I would like to achieve is to repeat a certain part of my circuit multiple times. So I thought of drawing it on a sheet and then instantiating the sheet multiple times.

But on the other hand, I would like to avoid using the hierarchical net identifier scope.

Is it possible to use a sheet multiple times with a flat design? From what I understand this is not possible, but am I correct? The problem in such a case would be, I guess, how to ensure that the ports of the multiple instances that have the same name will not be all connected together, since in a flat design all ports with the same name are connected together.

robertferanec , 09-29-2017, 07:06 PM

If you go to Schematic: Project -> Project Options -> Options -> Net identifier scope, you may try different settings.

PS: I do not use hierarchical design, so I am not sure if what you are trying to achieve is possible or not. Maybe someone else can help?

k.ifantidis , 11-20-2017, 11:48 PM

Hello,
I have found this document when i was searching the same thing on the net. I haven't yet concluded which designing style to use. So if you have any feedback i would love to hear it.
Best regards.



Konstantinos Ifantidis

robertferanec , 11-21-2017, 01:34 PM

Thanks for sharing the document. Very useful! I think you can decide based on your project and this document.

PS: Interesting reading. I have never used the "Copy Room Formats " feature nor "Channel offset"