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DDR3 Routing

mostafa222 , 12-14-2016, 08:42 AM
Hi Dear Robert.
I Want To Design 2 DDR3 Ram With ZYNQ FPGA. I Watch Your Video And Other. I Have Some Question.
1: I don't Know How to Draw The Layout And What Should I Consider From Impedance,Routing Track Length Matching And High Frequency PCB Design Consideration. From Where I Must Start Routing. Please Tell Me Some useful Resource About BGA And DDR3 Routing, High Frequency PCB Design Consideration.
2: In Impedance Calculation Formula, Why we don't Consider Track Length.
3: I want use 8 layer. what is the best stack-up?(How Many Signal And Plane Layer And Where they must be Located)
4: How Many Routing Topology Is there(fly-by , T and ...). I Want Some Resource To Learn About Them.
robertferanec , 12-15-2016, 08:56 AM
Hello Mostafa,

to answer your question, it is the whole topic, or to be precise to answer your questions it is the whole Advanced PCB Layout Course ( http://www.fedevel.com/academy/onlin...layout-course/ ). So, honestly, I am not really sure what to answer. Maybe, if you have more specific questions?

2) Impedance doesn't depend on track length

4) For DDR3, usually you can use fly-by, in some cases you can use Balanced T-Branch. You can study them. Have a look for example at our iMX6 Rex (T-Branch) module and OpenRex (Fly-by) and download the Altium projects. You can play with the PCB file, measure the tracks, see how they are routed. You can also read iMX6 Design guide: http://cache.nxp.com/assets/document...6DQ6SDLHDG.pdf
mostafa222 , 12-15-2016, 09:13 AM
thanks robert
mostafa222 , 12-15-2016, 09:37 AM
In Below Picture, How Do you Calculate Track Size And Gap Size For Diff90 Class To Maintain 90 ohm Impedance?
robertferanec , 12-15-2016, 04:03 PM
Have a look at my blog. You can find there a lot of useful info. For example, this may help you: How to design PCB stackup

Basically, to be able to calculate width/gap, you need to know stackup (materials from which PCB is going to be build and how they are ordered). Then, you can use for example Free software called Saturn PCB Toolkit. It can give you approximate numbers. If you need the precise numbers (the real number which you should use in your PCB), you need to get them from your PCB manufacturer - they will calculate them based on stackup, materials, PCB manufacturing process etc.

For your design, you should always ask your PCB manufacturer to confirm or send you the exact track geometry (width/gap) for specific impedance and specific stackup.
mostafa222 , 12-15-2016, 11:06 PM
Thank's Again. I Read Your Blog From 15 Day ago and i watch all of your very very good video. I download Saturn PCB Toolkit. I Have Some Question About it. In Figure 1,
1: I Found That Number 1 Is for Calculation Track Impedance for Top And Bottom Layer(Because Track located at the top of dielectric). am i right?
2: Number 2 is for signal located on the mid layer. am i right?
3: in Number 2, Planes Located At the Top and bottom of track is Gnd or power plane? I Mean Should i consider Gnd plane or power plane must be considered too?
4: what is the number 3?
5: I Usually Place A polygon with hatched form on the top and bottom layer and connect it to the ground. is it good or i should not do that? Is it can change my impedance calculation?

I choose Figure 2 as my layer stack up for 8 layer board. is it good?

in figure 3, What is the difference between signal length, routed length and unrouted length?

i apologize because of so many question i asked.
robertferanec , 12-16-2016, 08:27 AM
@mostafa222, please, it would be very useful if you always create a new topic for each question. Otherwise it is hard for other people find answers.

- Normally I use Microstrip (TOP & Bottom) and Stripline Asym (tracks inside layers). However, it depends on your stackup, but you were able to figure it out based on the pictures. I do not use Coplanar Wave. I am not sure how and what exactly it calculates.

- To calculate impedance, you always need a reference plane (plane below or/and above the track) Ground is usually good reference plane, power can sometimes be a good reference plane (e.g. if there are a lot of decoupling capacitors).

- I do not use hatched polygons and I do not pour ground on top and bottom layer.

- I normally do not use 8 layer stackup. This may help you: 3 STEPS How to determine / calculate number of PCB layers

- routed (sum of length of segments routed in that net), unrouted (still missing length to route), signal length (they keep changing some calculations, but this number can be used for length matching e.g. it calculates shortest length between pins + length in VIAs etc.)
mostafa222 , 12-16-2016, 08:34 AM
Thank you because of your answer.
i apologize because of single post. i dident know one post is not good. ok. in future, i use different post.
thanks again
Reva_851 , 07-07-2022, 03:25 AM
Hello Everyone,

I need help regarding to the routing of LPDDR3 with A64 processor. I have routed data signal on the top layer and data strobe signal on the bottom layer of single byte lane. Is it ok if I route these signals in this way if the delay is already accounted for?

This is data signal

This is data strobe signal

robertferanec , 07-09-2022, 03:30 AM
I would not do that.
Reva_851 , 07-11-2022, 11:13 PM
Thank you sir for your response,
I will try to route signals on same layer
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