Luca , 09-15-2019, 01:36 PM
Good evening Robert, as you suggest i post here also for other people. i'm doing some practice in Lesson 7 of Advanced PCB Layout Course, now with USB1 differential pairs lenght matching.
during lenght matching of each segment on every layers, and it seems, for my eyes and experience, correctly matched but Altium report rules violation.
I've checked for superimposed segment or mismatch in vias/pads center also but i can't find any difference.
I've attached some image that shows my activities, and values, during lenght matching USB1 and, of course, lenght in L1, L2, L11 and L12 are exactly the same and checked it also so in pics there are only L3 and L10.
Then i'm moving to DIFF100 class and i see same rule violation during HDMI_CLK lenght matching, for each layers.
I've checked and re-checked all the traces in each layers but nothing seems wrong, or i can't see it...
So i decided to delete all traces already routed and check if Altium reports difference, and there are!
As you can see in attached imag there are no tracks primitives and the vias are the same, because i think, or i suppose, that Altium still showing lenght in vias, but layers stack are exactly symmetrical and the number and type of vias used for N and P signals are the same.
Finally i've had my last trying with CLK1 signals, still in DIFF100, and i'm getting weird behaviour of Altium again.
I've attached the pics also and it's clearly visible that for each layers, except in L10, the lenghts for P and N signals are almost the same (in L3 there are 0.021mm small difference).
So in L10 N signal are 6.056mm and P signal are 5.621mm, BUT IF I INCREASE the N signal from 6.056mm to 6.767mm Altium tell me that i've matched correctly.... and violation disapper!
I really can't understand what's going on here...
Could you help me to understand what is going wrong?
All files are attached and separated for signals type inside a .ZIP archive where there is PcbDoc also for Altium directly check.