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DDR trace length matching including packages!

JohnsonMiller , 03-14-2022, 12:04 AM
In the DDR length matching issue and especially considering DDR3 and DDR4 timing, we have to consider the traces which are inside the DDR controller package and also the trace length that sits inside the DDR chip. Usually, the manufacturer, either controller or DDR chip, publishes this info and it is available, Then the DDR trace length will be the sum of three sections, DDR controller + PCB + DDR chip, correct? So wondering how AD handles the case? Can we import package trace data to AD?
JohnsonMiller , 03-17-2022, 02:16 PM
I got an answer to the above question, it is actually explained the main AD document under X-Signal, we have to edit schematic and PCB parts and apply an in-package delay to the schematic part and PCB footprint, sounds kind of tedious but it should work, I did not test it yet!
You may check this link, it is explained as the last item.
This page looks at the xSignals feature, which enables the correct treatment of a high-speed signal path as just that - a path for a signal to travel between a source and destination, through termination components as well as branches
robertferanec , 03-18-2022, 03:15 AM
Yes, you can add length in package and it is then considered in track length calculation. I think I only specified the length in package in footprint, but it looks like you can specify it in symbol and also in footprint: https://www.altium.com/documentation...d?version=16.0
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